Erik’s thesis, Multi-Loop-Ring-Oscillator Design and Analysis for Sub-Micron CMOS, examined the power-supply rejection of multi-loop ring oscillators (MROs), invented, and measured an MRO structure exhibiting an order-of-magnitude improvement in power-supply-noise rejection compared to conventional ring oscillators. Expanded complexity in modern computing devices necessitates supply rejection because a larger number of switching gates on a single silicon device more severely disturbs the power supply, corrupting the oscillator’s timing, whose error is quantified as phase noise. To analyze the proposed oscillator, the dissertation work also compiled a unified framework for oscillator phase-noise analysis as well as a generalized-delay-cell viewpoint of MROs to standardize their analysis and physical construction.
Currently, Erik designs analog & digital IO-interface electronics with Silicon Laboratories in Austin, TX, and his future plans include advancing precision clocks and data converters. In his free time, Erik enjoys poring over science fiction and swimming.