Michael Farmwald PhD

Hertz Fellow: Michael Farmwald PhD

Stanford University

Area of Study

Computer Science

Fellowship Years

1978 - 1981

Serial Entrepreneur and Partner at Benchmark Capital

Michael Farmwald is a serial entrepreneur with one of the most successful track records in Silicon Valley. Known for his unique combination of computer engineering skill and market vision, Mike has founded six companies to date, five of which were financed in part by Benchmark Capital, where he is a Venture Partner. Mike is probably best known for cofounding Rambus Inc., a developer of scalable chip technologies that enable semiconductor memory devices and ASICs to keep pace with faster generations of processors and controllers. After founding the company in 1990, Mike served as Vice President and Chief Scientist, overseeing the development of several key innovations, including the 1992 introduction of the world's first 4 Mbit RDRAM.

In 1993, Mike cofounded Chromatic Research, a privately held developer of media processors for the PC industry. Mike served on the board of Chromatic Research until the company was acquired by ATI Technologies in November 1998. In 1996, Mike cofounded Epigram, creator of advanced semiconductor home networking technology, which helped revolutionize high-speed networking connectivity within the home. Epigram was acquired by Broadcom in April 1999. In late 1997, Mike cofounded Matrix Semiconductor, a pre-IPO start-up backed by Skymoon, Benchmark and Microsoft, among others

Prior to his success at Rambus, Mike founded FTL in 1986. FTL, an ECL supercomputing company, merged with MIPS in the same year. At MIPS, Mike served as Chief Scientist for High End Systems. Following his experience at MIPS, Mike was an Associate Professor of Electrical and Computer Engineering at the University of Illinois. Mike holds a BS degree in Mathematics from Purdue University and a PhD in Computer Science from Stanford University. He currently sits on the boards of Rambus (Nasdaq: RMBS) and AON Networks.


1982 - On the Design of High Performance Digital Arithmetic Units